Daniel D. Gajski, University of California, Irvine

Published September, 1996 by Prentice Hall Engineering/Science/Mathematics

Copyright 1997, 447 pp.
Cloth
ISBN 0-13-301144-5

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    Digital Design-Electrical Engineering

    Logic/Digital Design-Computer Science

This text is designed to facilitate a thorough understanding of the fundamental principles of design without requiring readers to memorize an excess of confusing technological details. It integrates fundamentals with state-of-the-art techniques in computer design to demonstrate the complete design process, from specification to manufacturing.




Presents clear connections between principles and practice. (Throughout)
Progresses naturally and patiently through the design process, ranging in complexity from logic and sequential levels to the levels of RISC processors and complete ASICs. (Throughout)
Introduces a generic component library that reflects practical design constraints to help explain concepts and implement worked-out examples. (Ch. 5, 7)
Takes a contemporary approach to logic and sequential design, emphasizing a coherent design process instead of manual design techniques. (Throughout)
Introduces an ASIC design process based on the sequential and behavioral synthesis used in modern CAD tools. (Ch. 8)
De-mystifies the art of processor design by extending synthesis techniques to microprocessor design. (Ch. 9)
Demonstrates processor design on CISC and RISC processors including instruction set design and datapath design with data-forwarding and branch prediction. (Ch. 9)
The book features:

• Step-by-step design procedures in each chapter.
• Comprehensive worked examples that demonstrate designer's options and choices. (Throughout)
• Over 300 color illustrations that use color to enhance learning and material retention.
  
  

(NOTE:Each chapter ends with a summary, problems and further readings.)

1. Introduction.

Design representation. Levels of abstraction. Design process. CAD tools. Typical design process. Road map.

2. Data Types and Representations.

Positional number systems. Octal and hexadecimal numbers. Number system conversions. Addition and subtraction of binary numbers. Representation of negative numbers. Two's-complement addition and subtraction. Binary ultiplication. Binary division. Floating-point number representation. Binary codes for decimal numbers. Character codes. Codes for error detection and correction. Hamming codes.

3. Boolean Algebra and Logic Design.

Algebraic properties. Axiomatic definition of boolean algebra. Basic theorems of boolean algebra. Boolean functions. Canonical forms. Standard forms. Digital logic gates. Extension to multiple inputs and multiple operators. Gate implementations. VLSI technology.

4. Simplification of Boolean Functions.

The map representation. The map method of simplification. Don't-care conditions. The tabulation method. Technology mapping for gate arrays. Technology mapping for custom libraries. Hazard-free design.

5. Combinatorial Components.

Carry-ripple adders. Carry-look-ahead adders. Adders/subtractors. Logic unit. Arithmetic-Logic Unit. Decoders. Selectors. Buses. Priority encoders. Magnitude comparators. Shifters and rotators. Read-Only memories. Programmable logic arrays.

6. Sequential Logic.

SR-latch. Gated SR-latch. Gated D-latch. Flip-flops. Flip-flop types. Analysis of sequential logic. Finite-state-machine model. Synthesis of sequential logic. FSM model capture. State minimization. State encoding. Choice of memory elements. Optimization and timing.

7. Storage Components.

Registers. Shift registers. Counters. BCD counter. Asynchronous counter. Register files. Random-access memories (RAMs). Push-down stacks. Firs- in-first-out queue. Simple datapaths. General datapaths. Control unit design.

8. Register-Transfer Design.

Design model. FSMD definition. Algorithmic-state-machine charts. Synthesis from ASM charts. Register sharing (variable merging). Functional unit sharing (operator sharing). Bus sharing (connection merging). Register merging. Chaining and multicycling. Functional unit pipelining. ASM pipelining. Control- pipelining. Scheduling.

9. Processor Design.

Instruction sets. Addressing modes. Processor design. Instruction set design. Processor design. Reduced instruction set. RISC Design. Data forwarding. Branch prediction.

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