SPARC Architecture Manual Version 9, The

SPARC Architecture Manual Version 9, The, 1/e

SPARC International, Inc., Mountain View, CA

Published November, 1993 by Prentice Hall PTR (ECS Professional)

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Microprocessors - RISC Chips-Electrical Engineering

Assembly Language - SUN SPARC-Computer Science

Summary

This is the definitive reference for the latest generation of the enormously popular and influential SPARC microprocessors — the 64-bit SPARC-V9 — which is now being used by a variety of computer system vendors and is destined to the set the standard for high performance capacity into the next century.

describes the background, design philosophy, and high-level features of SPARC-V9.
reviews the typographic conventions used in the specification.
provides an overview of the SPARC-V9 architecture — its organization, instruction set, and trap model.
describes the SPARC-V9 data types, registers, instructions, trap model, and memory model in detail.
features several annexes with additional details — including Changes from SPARC-V8 to SPARC-V9.

Table of Contents

Introduction.
1. Overview.
2. Definitions.
3. Architectural Overview.
4. Data Formats.
5. Registers.
6. Instructions.
7. Traps.
8. Memory Models.
Annex A: (Normative) Instruction Definitions.
Annex B: (Normative) IEEE 754-1985 Requirements for SPARC-V9.
Annex C: (Normative) SPARC-V9 Implementation Dependencies.
Annex D: (Normative) Formal Specification of the Memory Models.
Annex E: (Informative) Opcode Maps.
Annex F: (Informative) SPARC-V9 MMU Requirements.
Annex G: (Informative) Suggested Assembly Language Syntax.
Annex H: (Informative) Software Considerations.
Annex I: (Informative) Extending the SPARC-V9 Architecture.
Annex J: (Informative) Programming With the Memory Models.
Annex K: (Informative) Changes from SPARC-V8 to SPARC-V9.
Bibliography.
Index.