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Digital Signal Processing Applications With Motorola's DSP56002 Processor, 1/e

Mohammed El-Sharkawy, Purdue University, Indianapolis, Indiana

Published August, 1996 by Prentice Hall PTR (ECS Professional)

Copyright 1997, 448 pp.
Cloth
ISBN 0-13-569476-0


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Summary

A comprehensive guide to applications development with the industry-leading Motorola DSP56002 digital signal processor, and its accompanying development tools.

Features


Introduces the operation of the DSP56002 digital signal processor, the DSP56000EVM Evaluation Module, and the DSP Assembler software.
Explains the DSP56002's processor architecture, addressing modes and instruction set.
Presents real-time digital signal processing routines and demonstrates their implementation.


Table of Contents

    1. Introduction to the DSP56002 Digital Signal Processor and the DSP56002EVM Evaluation Module 1.

      DSP56002 Processor General Description. DSP56002EVM Evaluation Module General Description. EVM Set Up. Installing the Software. Summary of Debug-EVM Commands. Basics of Some Debug-EVM Commands. Using the EVM to Program the DSP56002. Reference.

    2. Introduction to Motorola’s DSP Assembler Program.

      Installing the ASM56000 Assembler Software Program. Program Source Statement Format. Entering and Editing a Canned DSP56002 Program. Assembling a Canned DSP56002 Program. Program Development and Execution Using the Debug-EVM Software Program. Defining and Using Macros. References.

    3. DSP56002 Architecture and Addressing Modes.

      DSP56002 Architecture Review. How to Proceed. Data ALU Execution Unit. Program Controller. Address Generation Unit. Addressing Modes. Reference.

    4. DSP56002 Instruction Set.

      Instruction Format. Parallel-Move Operations. Parallel-Move Types. DSP56002 Instruction Set. Reference.

    5. Introduction to Digital Signal Processing Systems.

      DSP System. CS4215 Multimedia Audio Codec. DSP56002 Processor Port C. DSP56002 Interrupt Priority Register. Initialization Macro. Exercising the DSP System.

    6. Designing FIR Filters and Implementing Them on the DSP56002 Processor.

      FIR Filter Frequency Response. Relating a Practical FIR Filter to an Ideal FIR Filter. Specifying a Practical FIR Filter. Using the Window Method to Design a Practical FIR Filter. Using a Software Program to Design Practical FIR Filters. Implementing a FIR Filter. Digital Filter Design and Analysis System Software Program. FIR Filter Demonstration System. Implementing FIR Filters. References.

    7. Designing IIR Filters and Implementing Them on the DSP56002 Processor.

      IIR Filter Transfer Function. Review of the Bilinear Transformation. IIR Filter Specifications. Normalized Low-Pass Filter Design. Analog Filter Design. Digital Filter Design. Implementing a Biquad Section on the DSP56002 Processor. Implementing an IIR Filter. Digital Filter Design and Analysis System Package. DSP56002 Macro for Implementing an IIR Filter on the DSP System. IIR Filter Demonstration System. Designing and Implementing IIR Filters. Quantization Effects. References.

    8. Implementing the Fast Fourier Transform with the DSP56002 Processor.

      FFT Review. Running the DSP56002 Demonstration Software. FFT Implementation. References.

    9. Designing Adaptive FIR Filters and Implementing Them on the DSP56002 Processor.

      LMS Algorithm Review. Implementing an Adaptive FIR Filter on the DSP56002. Adaptive FIR Filter Demonstration System. Implementing an Adaptive FIR Filter on the Demonstration System. References.

    Appendix A. DSP56001 Interface Techniques and Examples.

      Interfacing Motorola’s DSP56001 to Pseudo Static RAM. Pseudo-Static RAM. A Simple Dynamic RAM Interface for the DSP56001. DRAM Basics. A Simple ISA Bus Interface for the DSP56001. Communicate with the DSP56000 Host Interface Using C Language. References.

    Appendix B. Implementing IIR/FIR Filters with Motorola DSP56000/DSP6001.

      Introduction. Second-Order Direct-Form IIR Digital Filter Sections. Single-Section Canonic Form (Direct Form II). Single-Section Transpose Form. Cascaded Direct Form. Filter Design and Analysis System. FIR Filters. References.

    Appendix C. Implementation of Fast Fourier Transforms on Motorola Digital Signal Processors

      Introduction to the Fourier Integral. The Discrete Fourier Transform. The Fast Fourier Transform. Complex FFT on the Motorola DSP Family. Optimizing Performance of the FFT. Real-Valued Input FFT Algorithm. Two Dimensional Fourier and Cosine Transforms. Competitive Analysis of FFT Performances. Conclusion. Fully Optimized Complex FFT. Real-Valued Input FFT. References.

    Index.
    DSP56002 Demonstration Software Order Form.


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